Tutorial

Track 1: "Interstellar Innovations - Navigating new dimension in Design, Testability and Yield"

1. Winner: 3D IC Integration and Multi-Die Verification

   Galina Ross, Abraham George Samsung

Track 2: "Intelligent Silicon- Accelerating the future of AI, Digital Twin and Advanced Packaging"

1. Winner: Fabrication the future: GenAI Powered Digital Twin

   Puja Suha, Hemlata Pandey and Sumith Shetty Western Digital

Technical Paper

Track 1: AI Accelerator and Custom Hardware

1. Winner: CTPGenius: Category Theoretic Prompt Graphs for Modular RTL Generation with Large Language Models

   Anmol Bhasin Synopsys

Track 2: Embedded System, Real-time Computing and Automotive Electronics

1. Winner: Method to Effectively Manage Read Disturbed Blocks in Flash Storage

   Kiranmayi Kamalay, Praveen Bademi, Nishchay Malakar, Anantha Sharma, Saurabh Dongre Samsung

Track 3: Communication, Connectivity, Multimedia and Digital Twins Design

1. Winner: Opportunistic Communication using Intelligent Reflecting Surface for 6G systems

   Kanchan Verma, Ankit Dhabriya, Arjun K S, Vamshidhar K, Sarvesha A G Samsung

Track 4: Design Verification and Validation

1. Co-Winner: The Hidden Flaws: A Debug Tale of Silicon Bugs Masked Across Generations & Lessons Learnt

   Ayushi Bapna, Pervez Garg, Satyam Pawar, Arif Mohammed, Sarang Menon, Mohit Rikhari Texas Instruments
2. Co-Winner: Deep Learning for accelerated debugging in Design Verification and Post Silicon Validation of Scandump design

   Shreya Joshi, Poonam Shettar, Sanjoy Saha, S Shrinidhi Rao, Alok Kumar Samsung

Track 5: VLSI Design, Circuits and Architectures

1. Winner: Efficient Last Level Cache Management Technique To Reduce Memory Overhead

   Rajini Bevara, Siva Nageswara Rao Bandreddy, Vimal Singh, Anil kumar Lamichhane, Sumakanth R G Qualcomm

Track 6: Semiconductor Packaging, Integration and System Design

1. Winner: Enabling Multi-fabric Net Tracing: A Step Towards Holistic EDA System Integration

   Shweta Kumari, Tapan K. Singh, Rudy Couget, Amit K., Vidhi Bansal, Rohit Kumar Cadence

Poster

1. Best Poster Award

   Winner: Low Power 2nm Ultra-Low Voltage SRAM Operating at 0.35V with Enhanced Read/Write Circuitry

   Aishwarya K M, Sanatkumar Upadhye, Manish Trivedi, Jaswinder Sidhu, Ramesh Halli Mediatek
2. Runner-Up Poster Award

   Winner: Design of Capacitive-based MEMS Displacement Sensor using COMSOL

   Kusuma N Central Manufacturing Technology Institute, Chinmayi K P, Yashwanth G Siddaganga Institute of Technology, Tumkur

Demo

1. Best Demo Award

   Winner: Pocket Lab: A Versatile Demo tool for Precision Converters

   Disha D, Supriya Kantipudi ADI
2. Runner-Up Demo Award

   Winner: Sentinel- A Power optimization solution

   Tanisha Sharma, Oitri Sarker and Abinash Sahoo Infineon Technologies