IMPORTANT DATES

Deadline for submission of Papers/Tutorials/Demos : May 12th, 2025
Communication of acceptance to authors : Sept 16th, 2025
Conference : Nov 12th and 13th, 2025

THEME, OBJECTIVE & FOCUS

THEME

Transforming the Future with Data-Driven Innovations in the Semicon-Verse


OBJECTIVE

WinTechCon is IEEE only technical conference by and for women in engineering, is committed to providing a platform for showcasing high quality technical contributions made by women technology leaders in industry and in academia. The conference will focus on electronic system design and associated areas. WinTechCon agenda encompasses innovations in both software and hardware components of system design which are fueling thought leadership, cutting-edge research, and new products.


FOCUS AREA

Semicon-Verse, a riveting fusion of "semiconductors" and "universe," suggests a dynamic landscape where the Data-driven technological advances, with AI-ML at core, blur the boundaries of technology and imagination. In this ever-expanding realm where digital twins are being developed by intertwining AL-ML with IoT and HBM, leading to create informative, predictive and comprehensive models to improve, enhance and innovate productivity and maintainability of the product. Advances in sensor, communication technology, automotive safety his redefining the mobility. Enhancements in Cybersecurity measures ensuring safeguarding the digital frontiers. Innovation today knows no bound and future is getting shaped by seamless integration of cutting-edge technologies.

    WinTechCon 2025 invites papers, demos, and tutorials in following Areas and their adjacencies

    • VLSI Design and Architecture
    • Semiconductor Devices and Circuits (Digital/Analog)
    • Neuromorphic and Quantum Computing Circuits
    • Communication Networks and Connectivity for 6G
    • Embedded Systems and Real-Time Computing
    • Trust and Security in Semiconductor Design
    • Signal Processing and Applications
    • AI Accelerators and Custom Hardware for Machine Learning
    • Advanced Packaging and 3D IC Technologies
    • Cyber-Physical Systems and Digital Twins
    • Automotive Electronics and Hardware
    • Emerging Memory Technologies
    • Design Verification and Formal Methods
    • Emulation and FPGA Prototyping

SUBMISSION TRACKS

Authors are invited to submit your original unpublished research work through the Microsoft CMT tool: Conference Management Toolkit - Author Console under following tracks.

This track invites papers covering advances in digital, analog, and mixed-signal circuit design, including semiconductor devices, processor architectures, and memory technologies. Topics include low-power and high-performance design methodologies, neuromorphic and quantum computing circuits, emerging memory technologies, and novel architectures for next-generation computing. Contributions on CAD tools and physical design optimizations are also welcome.

Papers are invited on AI-specific semiconductor innovations, including AI/ML accelerators, edge AI chips, and custom hardware for deep learning. This track also covers hardware-algorithm co-design for machine learning, neuromorphic computing, reconfigurable architectures, FPGA-based AI systems, and AI-driven design automation.

This track covers embedded hardware and software co-design, real-time computing techniques, and the growing role of semiconductors in automotive and safety-critical applications. Topics include microcontroller and DSP-based design, firmware optimizations, hardware-software interaction, autonomous vehicle electronics, in-vehicle networks, and AI-driven solutions for Functional Safety.

Security is becoming a key challenge in semiconductor development. This track focuses on hardware security, trust, and privacy in semiconductor design. Topics include secure chip architectures, cryptographic hardware, side-channel attack mitigation, and PUF-based security solutions.

This track invites research on semiconductor advancements enabling 6G networks, IoT, and cyber-physical systems. Topics include RF and mmWave circuit design, AI-driven network optimization, digital twin modeling, and multimedia and signal processing for video, image, and audio applications in next-generation connectivity. Papers covering hardware-software co-optimization for real-time networked systems, AR/VR, and immersive metaverse applications are also of interest.

This track invites contributions in design verification methodologies, formal methods, emulation, and FPGA prototyping for functional validation. Additionally, innovations in these areas with AI-driven solutions are encouraged.

With the increasing complexity of semiconductor systems, this track focuses on innovations in chiplet-based architectures, 3D ICs, heterogeneous integration, and advanced packaging techniques. Papers discussing co-design methodologies for hardware-software integration, reliability, and thermal challenges in multi-die packaging, and emerging interconnect technologies are encouraged.

CATEGORY OF SUBMISSION

TECHNICAL PAPERS

All the accepted and presented papers will be submitted to IEEE Xplore for possible publication, ensuring quality, global visibility and recognition.
In addition to papers with innovative and distinguished improvements in the current state-of-the-art in any of the aforementioned areas, papers describing tactical innovation and improvement on product engineering such as inventions, distinguished improvements in state-of-the-art engineering processes, as well as cross pollination of ideas, surveys, strategies, flows, methodologies, process improvements and/or knowledge that are applied in product development in any of the aforementioned areas are welcome.

TUTORIALS

  • It is expected that the authors are well-known in the tutorial subject and/or have several years of work experience in the area.
  • Include
    1. 1. The title, and anonymous abstract (300 words) in a PDF
    2. 2. The biography of the presenters in a separate PDF
    3. 3. The anonymous tutorial slides in a PPT
  • Tutorials may have no more than two presenters with at least one, woman presenter.
  • The tutorial duration is 1 hour.
  • The importance of the proposed topic, details of content to be covered, and expected audience takeaway should be covered in the abstract and in the PPT slides
  • The proposal must bring out the motivation and the organization of the tutorial

PROJECT DEMOS

  • Include
    1. The title, and anonymous abstract (300 words) in a PDF
    2. The biography of the presenters in a separate PDF
    3. The anonymous project demo description in a PDF
  • MUST have background and objective of the project, the problem description which the project attempts to solve, steps/details of the methodology, format/results of the demonstration, and audience takeaway should be covered in the project demo PDF.
  • Demos may have no more than 2 presenters, with at least one, woman presenter.

SUBMISSION GUIDELINES

FORMAT OF TECHNICAL PAPER SUBMISSION

  • Each paper MUST BE within a limit of six A4 sheets in a double-column format and 10-point font, which is IEEE conference format, including figures and tables.
  • Follow IEEE Conference Format Template. Refer https://www.ieee.org/conferences/publishing/templates.html
  • Papers may have no more than 6 authors, and 2 presenters, with at least one woman author and presenter. Primary Author SHOULD be woman.
  • Include the PDF of the full paper, complying with anonymous submission.

POINTS TO REMEMBER

  • The primary author/presenter of the paper SHOULD BE a FEMALE. Co-authors/co-presenters can be a MALE or FEMALE.
  • All submission manuscripts and abstracts MUST BE anonymous without revealing author names and affiliations.
  • Professionals from the technology industry (semiconductor/hardware/software) and academia may submit.
  • IEEE format SHALL BE followed. Failing it will result in rejection
  • All the co-authors MUST BE shown in the initial submission. No further authors can be added for selected papers.
  • Technical paper submissions can be accepted either for paper presentation or poster presentation, based on discretion of the TPC. The final PPT should be formatted accordingly, based on acceptance notification.
  • If a manuscript is accepted for paper presentation, the authors will be expected to submit a final version of the manuscript that will be added to IEEE proceedings.

ANONYMOUS SUBMISSIONS

  • To comply with IEEE review requirements, all submission manuscripts MUST BE anonymous.
  • DO NOT identify the author(s) by their name(s) or affiliation(s) anywhere on the manuscript or abstract.
  • All references to the author(s) own previous work or affiliations in the Bibliographic citations must be in the third person.
  • AVOID the use of “omitted for blind review” in the Bibliography section

For queries reachout to us on email: wintechcon2025@samsung.com


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