Day 1 (Virtual)

Welcome Note and Introduction

2:00 PM - 2:15 PM

Fabricating the Future: GenAI-Powered Digital Twins

Puja Sahu, Hemlatha Pandey, Sumith Shetty - Western Digital

2:15 PM - 3:15 PM

Break

3:15 PM - 3:25 PM

FAI Accelerators and Custom Hardware for Machine Learning

Rani Bhart, Modassar Rana - IBM

3:25 PM - 4:25 PM

A Unified Cross-Fabric Co-Design Methodology for IC-Package-Board in Advanced Semiconductor Systems

Kirti Sikri, Evneet Bhatia - Cadence

4:25 PM - 5:25 PM

Closing tutorial Session

5:25 PM - 5:30 PM

Welcome Note and Introduction

2:00 PM - 2:15 PM

3D IC Integration & Multi die Verification

Galina Ros, Abraham George - Samsung Electronics

2:15 PM - 3:15 PM

Break

3:15 PM - 3:25 PM

Scan based Volume Logic Diagnosis for Yield Enhancement of Products & Technology qualification

Hina Musafir - ST Microelectronics

3:25 PM - 4:25 PM

Designing Robust DFT Architecture: From Principles to Best Practices

Pavithra K, Pervez Garg - Texas Instruments

4:25 PM - 5:25 PM

Closing tutorial Session

5:25 PM - 5:30 PM